1. Field of the Invention
The present invention relates to a semiconductor device and a method for forming the same. Particularly, it is applicable to a liquid crystal electro-optical device or a full contacted image sensor device etc.
2. Description of the Prior Art
So far, the insulated gate field effect semiconductor device has been well known and widely used in various fields. This semiconductor device is formed on a silicon substrate and is utilized as IC or LSI, integrating many semiconductor elements functionally.
On the other hand, a thin film type insulated gate field effect semiconductor device (hereinafter to be referred to as TFT) which is formed by laminating thin films on an insulating substrate has started to be positively used in such parts as a switching element, a driving circuit for a picture element of the liquid crystal electro-optical device, and a reading circuit part of a full contacted image sensor.
As mentioned above, the TFT is formed by laminating thin films on the insulating substrate, using gaseous phase method. The temperature of the forming-atmosphere is such low as around 500.degree. C. even at the highest. Then, it is possible to use cheap soda glass or borosilicate glass etc. as a substrate. Therefore, TFT has such merits as it can be formed on a cheap substrate, its maximum size is limited to only the apparatus size applied to the thin film forming by the gaseous phase method, and it is easy to form a transistor on a large area substrate. Then, it has been expected and also partly realized that the TFT will be applied to a liquid crystal electro-optical device in a matrix structure having a lot of picture elements, and a one-dimensional or two-dimensional image sensor.
FIG. 2 is a schematic diagram showing a typical structure of the conventional TFT, in which reference numeral 1 designates an insulation substrate made of glass, 2 an amorphous thin film semiconductor, and a reference numeral 3 designates a source and a drain region, a reference numeral 7 designates a source and a drain electrode, and a reference numeral 8 designates a gate electrode.
Such TFT is generally prepared as follows. At first, a semiconductor film will be formed on the substrate, and a semiconductor region 2 will be formed into an island shape at a necessary part, by patterning the semiconductor film using the first mask. Then, the gate insulation film material will be formed and the gate electrode material will be formed thereon, and the gate insulation film material and the gate electrode material will be patterned using the second mask to form the gate insulation film 6 and the gate electrode 8.
After that, the source and drain regions 3 will be formed by a self-alignment in the semiconductor region 2, using the mask of photoresist formed with the third mask and the gate electrode 8 as a mask. Then, an interlayer insulating film 4 will be formed. Contact holes will be formed in the interlayer insulating film using the fourth mask, to connect electrodes to the source and drain regions 3. Finally, the electrode 7 will be formed to complete the preparation of TFT, by patterning the electrode material which was previously formed, using the fifth mask.
As described above, it has been needed for the preparation of usual TFT to use five sheets of mask, especially six sheets of mask in case of complementary type TFTs. As a matter of course, the more IC is complicated, the more sheets of mask will be needed. In this way, using many masks requires an intricated process in the preparation of TFT element, and increases inevitably the number of mask alignments, the result being in that it brings about the falling down of yield and productivity of the TFT element preparation. Further, it poses a problem that the large-sizing of an electronic device using the TFT element, and the small-sizing of TFT element itself, and the fine patterning render the above yield and productivity more fall down.